FPGA based Mandlebrot set generator

Mandlebrot Set Generator As I said in my last post, I implemented a Mandlebrot set generator in my STM32. Even though it was running at 64MHz, generating the set took a fair bit of time, slow enough to not even maximise the fully available SDRAM capacity at the time. At this point, I decided to […]

uHMCU – Alpha 0.1

After a pretty large redesign, I can now safely say that the uHMCU is in alpha stage! I’ve ironed out most of the bugs for my USART module and can now both send and receive data. I tested it up to 115200 baud with the USB <-> USART bridge on my FPGA board and after […]

uHMCU 7 – USART

I posted about my microcontroller design a couple of posts back. As it turns out, I had actually designed it wrong! I didn’t have the pipeline fully sorted meaning I couldn’t properly execute some instructions and some things weren’t working properly. After a quick stack overflow¬†question, I realised the error of my ways and figured […]

uHMCU FPGA Implementation

Having already designed the microcontroller in a simulation environment, I wanted to take it to the implementation phase. I’d previously shown an implementation of a timer in simulation so keeping the same test program, I wanted to make sure it worked in implementation! Firstly, I decided to replace the simulation ROM and RAM for IP […]

Enter the uHMCU…

It’s been a while since I’ve sat down to do some proper VHDL but today (after MASSIVE advances with the Phobass these past few days), I’ve decided to write a miniature version of the HMCU. I say miniature in the lightest sense. Features: MISC architecture featuring 9 Instructions 16bit processing capability (22bit program word length) […]

Return of the HMCU…

Well! It turns out I’m coming to the end of my work placement (booo!) but boy have I learnt a lot. A lot of my work consisted of writing VHDL, along with testing its functionality in a simulation environment. I’ve learnt about text file parsing, different methods of structuring your VHDL code, along with good […]