SDRAM + VGA + FPGA = SPI Addressable graphics card!

Having already written an SDRAM based VGA controller, I’ve finally got round to writing a simple SPI module that allows my STM32F0 discovery board to write to the SDRAM during blanking. In the video above, I hadn’t implemented a “busy” pin so my STM32F0 was spamming pixels regardless of whether there was blanking or not. I’ve not implemented a FIFO so any pixels that are sent while the SPI controller is waiting for memory access will be lost.

SPI Protocol
For complete ease of design, the SPI protocol is exceptionally simple consisting of 3x 16bit transactions. The lowest 16bit word is the pixel to be written and the other 32bits are the memory address (though only 24bits of these are used), no other logic is implemented so the SPI side merely feels like an addressable memory slave.

I’ve not got the code “github ready” yet so that’ll have to wait!

5 thoughts on “SDRAM + VGA + FPGA = SPI Addressable graphics card!

  1. Dear Harris,
    That’s awesome work! Thanks a lot to share your experience here.
    In the meantime, did you clean up a bit your code to share it on Github, or could you just send it as it is? I’m very interested in the part to write from SPI to SDRAM.
    Many thanks in advance.
    Best regards,

    1. Its funny you mention this actually! I’ve recently started doing an overhaul of this entire project. I’ve recorded the SDRAM controller and I’m waiting for a VGA cable to arrive (I didn’t bring my monitor with me this term). Once this arrives, I should be doing a new post on the entire system – there are a few more components that I’ve added now.


      1. That are great news!
        I’m looking forward to reading from you.
        If, in the meantime, I can help to test things, just let me know!
        Best regards,

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