SDRAM + VGA + FPGA = SPI Addressable graphics card!

Having already written an SDRAM based VGA controller, I’ve finally got round to writing a simple SPI module that allows my STM32F0 discovery board to write to the SDRAM during blanking. In the video above, I hadn’t implemented a “busy” pin so my STM32F0 was spamming pixels regardless of whether there was blanking or not. I’ve not implemented a FIFO so any pixels that are sent while the SPI controller is waiting for memory access will be lost.

SPI Protocol
For complete ease of design, the SPI protocol is exceptionally simple consisting of 3x 16bit transactions. The lowest 16bit word is the pixel to be written and the other 32bits are the memory address (though only 24bits of these are used), no other logic is implemented so the SPI side merely feels like an addressable memory slave.

I’ve not got the code “github ready” yet so that’ll have to wait!

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